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If you’re making a modern computer chip you’re going to need to put layer after layer of traces down. You’re also going to need layer after layer of insulator between your metal in order to not short circuit everything. But if you start growing oxides and depositing metals and such and so forth your wafer is going to end up wrinklier than yer grandma’s keister. That’s going to cause problems. Your layers won’t have uniform thicknesses anymore. Particularly the photoresist which means your chances at making a decent pattern degrade. Assuming you don’t end up with fatal defects from underdeveloping at the very least you lose feature size precision. Oh, and you end up with the occasional smug columnist making you visualize yer grandma’s keister. Heh.
Surely You Wouldn’t Be Bringing This Up if You Didn’t Have a Handy Gadget Solution?
Well you’re in luck Mr. Douglas. What you need is a Chemical Mechanical Planaraization rig. Or Chemical Mechanical Polishing. CMP. Whatever. (It makes a difference, but people often use the terms interchangeably.) Now, you could just deposit some borophosphosilicate glass on there and heat it up, expect the glass reflow, cover that topography like the snows o’ winter covering a shallow grave. In the olden days that was good enough; got the job done. These days the devices are smaller, the lines sharper. If you want real flatness, if you need to get down to a fifty angstrom step height over the surface of the entirety of your wafer, you want the real McCoy. CMP; accept no substitutes.
Okay, but how do we do it? You have a wafer; it’s got more ridges and valleys than a waffle iron. You want to flatten that sucker out. Start by putting a nice, thick, dielectric layer on your wafer. We’ll deposit silicon dioxide on there in good measure. Here, lemme draw that out for you.
Instead of that lumpy surface we want it nice and flat so we can put another circuit on top of it. And remember, when we’re talking flat we’re talking real flat. To make the high parts low you need to apply pressure. To physically abrade off the surface you use particles in a slurry. To make sure you aren’t gouging the surface with your particles you make sure they’re softer than the surface. To make sure that you can still grind away with your soft particle slurry you use chemistry to soften up the very top layer of the material. All that’s the chemical and the mechanical of your planarization.
Wait, Could you Go a Little Slower on that Last?
Let’s take it from the top. Or rather, let’s take the top off those mounds in the picture. We need to get rid of silicon dioxide. Now, you could just etch it away (hydrofluoric acid eats it nicely) but that doesn’t get rid of your topography. On the other hand you could grind it down (as opposed to polish), but the strictly mechanical process will leave gouges and scratches in your surface, stuff that can break your circuits. What you need is something gentler than a grind but something that prefers to smooth things over the way an acid doesn’t. The solution is to combine the two and use a polish.
You polish with a slurry that contains both particles and chemistry. We want to gently wear down the surface so as to not gouge it and damage the devices underneath. We’ve got a SiO2 layer, and we need something softer than that, so we’ll use silica. Silica, as we all know, is made of SiO2. Hmm. That’s what the books* tell me, I assume it works out. Okay, silica chunks in the 100 nanometer or less diameter range (a quick googling tells me you can get this by the gallon for a touch over a hundred bucks. Alternately you can check with another site and they ask you to contact them for a quote on the price. Yeah, screw that.) This mixture basic, around a pH of 10. My textbook** also tells me that you ought to add a dilute hydrofluoric acid as an etchant. Wait, what? How does adding an acid to your basic solution give you a useful etchant? The book is silent on that question.
Okay, you’ve got a slurry. You don’t just slather it on there, you apply it through a polishing pad of porous polymer (Peter Piper approved.) Ideally your pad would apply pressure evenly to each high point across the surface of your wafer. Since that ideal is pretty darn hard to reach instead we’ve got pads that are made of layers of harder and softer material. Exact pad composition (and slurry composition while we’re at it) tends to be a trade secret. The pores in the polymer allow slurry to pass through your pad.
Okay, if someone hired you to run their CMP machine though, what would you be doing? Probably griping about the opposite shift. But never mind that. You’re standing in front of a round table. The table is covered by a polishing pad. Start the table spinning. Now drip slurry onto it. the slurry will soak into the pad and move through it towards the edges because of the spinning motion. It’s spraying everywhere; remind me to set up a bowl or something to catch that before we try this again. But never mind that for now; get your wafer onto the chuck. The chuck holds the wafer on by vacuum, with the top of the wafer pointing down. Set it to go. The machine will apply downward pressure and spin the wafer for a preset time. If the engineer has his act together (doubtful) your circuit will come out looking like this:
What Else can I Do with this Fantastic Technology?
You know you’re asking some pretty convenient questions today? The first answer is that you need flat surfaces so that when you stack a dozen layers of circuit on top of each other they all work and they all line up correctly. But there are a number more. Let me run down a couple of the more common ones:
- Way back when we started this series I mentioned using CMP as a final step in wafer preparation to ensure that the raw silicon wafer is as flat as can be.
- See those dark grey sections in the diagram? That’s called Shallow Trench Isolation (STI). You dig out portions of your wafer and fill it in with an insulator so current doesn’t leak from one transistor to the other. You cap those features with silicon nitride (Si3N4) which polishes more slowly than the oxide. Then you polish your oxide down to the nitride layer. Etch the uncovered oxide away, and later etch away the nitride with a CF4 plasma, leaving the oxide underneath right where you want it.
- The next step after the second diagram here would be to etch some holes in that nice flat oxide and drive some tungsten vias in there so you can connect these transistors to the layer above. You put tungsten on there by CVD. That leaves tungsten all over your oxide too. You can clean that off with a round of CMP. And again for the next layer, and the next layer above. To polish off tungsten instead of your basic slurry you want an acidic one, about three pH.
- You want copper traces on your wafer? Beautiful. Only there’s no good way to put them down with chemical vapor deposition. Instead you plate it over the entire surface of your wafer. If you’re clever you put oxide down in all the spots where you don’t want traces first, leaving canyons where you want the traces. Then when those canyons are plated up with the rest of it you can polish down to them and bingo you’ve got traces! If you’re not clever you’re probably going to need to start another wafer at this point.
Are there any Problems with this Miracle Cure of Yours?
Of course there are! If you don’t clean your slurry off the wafer real nicely you’ll leave silica boulders all over your parts. If you’re not careful with the pressure on your polish you might leave your wafer with an overall bowled shape. If you’ve got a lot of wide open spaces on your wafer you’ll have uneven polishing on them. If… you know what? We’ll call that good. I think we’ve all had enough of this subject for now. Join us fortnight next when we move on to a general semiconductor manufacturing overview in “You’ve Got Offsets in your MOSFETs”, or “CMOS: First Blood”.
*Different textbook this time around. Semiconductor Manufacturing Technology, by Michael Quirk and Julian Serda. 2001. Darn, I need a more up-to-date book than this.
**Also the same one I was using for Epitaxy: Fabrication and Engineering at the Micro and Nanoscale, by Stephen A Campbell. Some better information in here. Dated 2008.
This is part 40 of my ongoing series on building a computer, the sharing a wino’s bottle way. You may find previous parts under the tag How to Build a Computer. This week’s post has been brought to you by Hurricane Malt Liquor. For out of five modern hobos prefer Hurricane Malt Liquor!Published in